Masks are used in semiconductor fabrication for the projection of a structure pattern formed on them onto a substrate, for example, a semiconductor wafer. The structure pattern imaged on the substrate in a photosensitive layer is transferred into underlying layers on the substrate in a number of subsequent processes in order to form a respectively desired plane of an integrated circuit. The structure patterns to be projected by the mask include, in each case, openings which are formed within a nontransparent, light-absorbing layer.
If transmission masks are involved, then the light-absorbing layer is arranged as a chromium layer, for example, on a transparent substrate, for example, quartz. Radiation is sent through the mask in order to project the structure pattern onto the substrate.
If a reflection mask is involved, then the light-absorbing layer with the openings formed therein is arranged on a thin reflective layer stack of alternate layers made, for example, of silicon and molybdenum. This layer stack is patterned on a silicon carrier, for example. In this case, the substrate is understood to be the silicon carrier including the reflective layer stack.
By analogy, to fabricate integrated circuits with other higher packing densities, it is a challenge in the development of new mask technologies likewise to be able to fabricate increasingly smaller structures, i.e., openings in the light-absorbing layers on a mask. For this purpose, still higher resolution have progressively been used, following the respective current technology. As an alternative, etching processes have been developed in which the etch bias may be as small as possible.
Openings within a light-absorbing layer on a mask are fabricated in a manner similar to that when patterning a semiconductor wafer by exposure of a photosensitive resist with subsequent development and transfer of the developed, i.e., stripped-out structures into the underlying, light-absorbing layer. The exposure is effected by a light or particle beam generated, for example, by lasers, electron beam or ion beam projection sources.
Typically, the surface of the mask coated with the resist is scanned by the beam at the desired positions. Higher resolutions can be achieved by using shorter wavelengths in the case of light beams and by higher and higher acceleration energies in the case of particle beams.
Since the openings produced in the resist on the mask after development also cannot be transferred dimensionally accurately in an anisotropic etching step for opening the underlying light-absorbing layer, the diameters of the holes etched out in the underlying layer are widened with respect to the diameter of the openings in the resist produced by the ion or light beam. An etch bias can be optimized by a high degree of anisotropy in the etching process and also by a choice of the respectively adjustable etching parameters, for instance, etching time or dose, adapted to the layer thickness of the underlying layer.
At the present time, the minimum structure widths that can be achieved on a mask, i.e., the resolution, on account of the particle or laser beam technique taking account of the demagnifying projection onto a wafer (for example, factor 4 or 5), are smaller than the structure widths that can be resolved by projection on the wafer. However, by virtue of improved projection techniques, the reduction of the resolution on the wafer is advancing more rapidly than, for instance, in the case of mask fabrication. It is therefore to be expected that, in the foreseeable future, the resolution that can be achieved on a mask will be the cause of the minimum widths of structures in the integrated circuits then to be fabricated.
However, the capital expenditure in the area of mask development is very high for the companies fabricating mainly only medium-sized masks. There is a particular need here to find particularly cost-effective methods which make it possible to achieve higher resolutions on the mask at least transitionally or when special structure layers are present.